1 Technical Field
This invention relates to processors, and in particular to methods for detecting overflow and underflow during selected processor operations.
2 Background Art
A processor spends a significant portion of its time performing arithmetic operations. To ensure the accuracy of the computed results, the processor checks each operation to determine whether it raised an exceptional condition. The exceptional conditions for floating-point operations are defined by the IEEE 754-1985 Standard for Binary Arithmetic Operations (IEEE Std. 754). For example, arithmetic operations are subject to overflow and underflow exceptions. An overflow exception arises when a calculated number is larger than the largest number that can be represented in the format specified for the number. An underflow exception arises when a calculated number is smaller than the smallest number that can be represented in the format specified for the number. Under certain conditions, this exception is raised only when the result is also inexact, i.e. it can not be expressed exactly. When these exception conditions are detected, the processor passes control to an exception handler, which determines how to handle the condition or accepts some default result for the exception.
For example, under the IEEE Standard for Binary Floating-Point Arithmetic (IEEE Std. 745-1985)(IEEE Std.), a single precision floating-point number for 32 bit arithmetic is specified by a sign bit, 8 exponent bits, and 23 significant bits. If an arithmetic operation generates a number that is too large to be represented using the 8 available (positive) exponent bits, an overflow exception is raised. Similarly, if the number is too small to be represented by the 8 available (negative) exponent bits, an underflow exception is raised.
Exception checking must be both accurate and fast. If an exception checking method is inaccurate, the processor can generate incorrect results and is subject to crashes. Exception checking is done concurrently with the arithmetic operation being checked to minimize its impact on the processor speed. If the exception checking process is slower than the operation it is monitoring, performance of the processor is degraded.
One method for exception checking compares the results of an operation with a threshold value. The threshold value is usually the largest (smallest) number that can be represented in the format specified for the result. The result is compared with the numerical threshold, and an overflow (underflow) exception is raised if the result is greater (less) than the numerical threshold. One problem with this approach is that breaks down for certain situations when, as is common, results are rounded off. For example, if the calculated result exceeds the threshold value, it is typically rounded down to the threshold value. This approach does not distinguish between results that are rounded down to the threshold value (and rightfully raise an overflow exception) and results that just happen to equal the threshold value (and should not raise an exception).
Another method for detecting exceptions reads and writes explicit hardware flags in a status register to identify overflow or underflow conditions. The status register specifies various parameters to the processor for performing an arithmetic operation and is updated by the processor on the status of the operation. Before the operation begins, the current contents of the status register are read and saved, and control fields of the register are updated to indicate a mode for the operation. When the operation completes, status flags in the register are read to identify any overflow/underflow conditions raised by the operation. The original register contents are then updated with any new conditions (overflow/underflow) raised by the operation, and the updated contents are written back to the status register.
One drawback of this approach is that each read and write of the status register is a serializing operation. The instructions must be performed sequentially, and any instructions following a register read/write can not proceed until the read/write operation is completed. This makes detecting exceptions a relatively slow process. In a high performance processor, where every additional clock cycle is important, the method is inadequate.
The present invention address these and other issues associated with detecting exception conditions in various operations.